• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    A pixel of an image array comprising one or more charge storage structures (200), each charge storage structure comprising: a first charge storage trench (202) doped to have a first type conductivity device and having a first end (208) arranged to receive the charge accumulated by a photodiode; a second charge storage trench (204) doped to have the first conductivity type; and a first transfer gate (212) connecting a second end (214) of the first charge storage trench (202) and the second charge storage trench (202, 204) to a detection node (216), the first and second charge storage trenches being interconnected by a bonding channel (206) doped to have the first conductivity type and bordering a portion of an edge of the transfer gate (212).
    公开号:FR3065836A1
    申请号:FR1753771
    申请日:2017-04-28
    公开日:2018-11-02
    发明作者:Olivier SAXOD；Marie Guillon
    申请人:Commissariat a lEnergie Atomique CEA；Commissariat a lEnergie Atomique et aux Energies Alternatives CEA；
    IPC主号:
    专利说明:

    Field of the invention
    The present description relates to the field of image matrices, and in particular a pixel of an image matrix comprising one or more charge storage areas.
    Presentation of the prior art
    It has already been proposed to incorporate charge storage areas in pixels of an image sensor. For example, such charge storage zones allow the storage of charge carriers coming from a photodiode following a global shutter operation. In another example, charge storage areas allow the storage of charge carriers in time of flight image sensors which are capable of measuring depth information from an image scene.
    When the size of the CMOS pixels decreases, the space available for the charge storage areas also decreases. Smaller charge storage areas allow fewer electrons or holes to be stored, causing
    - B15678 - DD17702JB degradation of the dynamic range of the pixel, and therefore of the signal to noise ratio.
    It has been proposed to provide charge storage zones in the form of doped trenches which are pinched laterally by CDTIs (from the English capacitive deep trench isolations insulations by capacitive deep trenches) in order to maintain charge carriers there. There is a technical difficulty in increasing the size of such trenches while maintaining a compact arrangement of the pixels, which avoids increasing the time lag for the discharge of the charge and / or losing the possibility of reading the area of entire storage.
    summary
    An object of embodiments of the present description is to at least partially resolve one or more difficulties of the prior art.
    According to one aspect, a pixel of an image matrix is provided comprising one or more charge storage structures, each charge storage structure comprising: a first charge storage trench doped to have a first type of conductivity and having a first end arranged to receive the charge accumulated by a photodiode; a second charge storage trench doped to have the first type of conductivity; and a first transfer door connecting a second end of the first load storage trench, and the second load storage trench, to a detection node, the first and second load storage trenches being interconnected by a channel of link doped to have the first type of conductivity and bordering a portion of an edge of the transfer door.
    According to one embodiment, the link channel has a width of between 20 nm and 300 nm.
    According to one embodiment, the connecting channel comprises a right angle bend.
    According to one embodiment, the connecting channel provides a barrier of electrostatic potential between the first and
    B15678 - DD17702JB second charge storage trenches, the connecting channel being arranged so that the electrostatic potential barrier is less than an electrostatic potential barrier between the first charge storage trench and the detection node.
    According to one embodiment, the dimensions of the connecting channel, the concentration of dopants in the connecting channel, and / or a voltage level applied to the first transfer gate are arranged so that the energy gap separating the link channel and the detection node is at least 10 kT, where k is the Boltzmann constant and T is the temperature.
    According to one embodiment, the second load storage trench extends perpendicular to the first load storage trench.
    According to one embodiment, in addition to the first and second load storage trenches, each load storage structure comprises at most two other load storage trenches, the trenches of each load storage structure forming a T shape or a cross shape.
    According to one embodiment, the pixel further comprises a photodiode connected to the first charge storage trench by a second transfer gate.
    According to one embodiment, the first and second charge storage trenches are delimited laterally over at least a portion of their length by capacitive isolation trenches arranged to be polarized by a polarization voltage.
    According to one embodiment, the pixel further comprises a third charge storage trench doped to have the first type of conductivity and connected to the first or to the second charge storage trench by another link channel doped to have the first type of conductivity and bordering another portion of the edge of the transfer door.
    B15678 - DD17702JB
    According to one embodiment, the pixel comprises a plurality of said charge storage structures.
    According to another aspect, an image matrix is provided comprising a matrix of pixels, each pixel corresponding to the aforementioned pixel.
    According to another aspect, a method of manufacturing a pixel from an image matrix is provided, the method comprising the formation of one or more charge storage structures, each charge storage structure being formed: by forming a first charge storage trench doped to have a first type of conductivity and having a first end arranged to receive the charge accumulated by a photodiode; forming a second charge storage trench doped to have the first type of conductivity; and by forming a first transfer door connecting a second end of the first load storage trench, and the second load storage trench, to a detection node, the first and second load storage trenches being interconnected by a link channel doped to have the first type of conductivity and bordering a portion of an edge of the transfer door.
    Brief description of the drawings
    These objects, characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments given by way of illustration and not limitation in relation to the attached figures in which:
    Figure IA is a flat view of a pixel of an image matrix which has been proposed;
    Figure IB is a sectional view of the pixel of the figure
    IA;
    FIG. 2A is a flat view of a charge storage structure of a pixel according to an exemplary embodiment of the present description;
    B15678 - DD17702JB FIGS. 2B and 2C are sectional views of the pixel of FIG. 2A according to an exemplary embodiment;
    Figure 2D is a diagram illustrating an example of electrostatic potential curves along sections of the charge storage structure of Figure 2A;
    FIG. 3A is a flat view of a charge storage structure of a pixel according to another exemplary embodiment of the present description;
    Figure 3B is a diagram illustrating an example of peak electrostatic potential curves along sections of the charge storage structure of Figure 3A;
    Figure 4 is a flat view of a charge storage structure of a pixel according to another embodiment of the present description;
    Figure 5 is a flat view of a charge storage structure of a pixel according to yet another embodiment of the present description; and FIG. 6 is a flat view of an image matrix comprising pixels having charge storage structures according to an exemplary embodiment of the present description. detailed description
    In the description which follows, the term substantially is used to designate a tolerance of plus or minus 10% around the value in question. Terms relating to the orientation of a device, such as vertical, horizontal, etc., are assumed to apply when the device is oriented as shown in the corresponding figure.
    Although in the present description, exemplary embodiments are described in relation to a pixel capable of detecting the depth in an image on the basis of the time of flight, it will be clear to those skilled in the art that the principles described here could be applied to any pixel requiring charge storage, and could thus be applied to other types of pixels comprising one or more storage structures 3065836
    B1567Ô - DD17702JB of charge, including pixels capable of functioning as a global shutter.
    FIG. 1A is a flat view of a pixel 100 of an image matrix according to an exemplary embodiment. A similar pixel is for example described in more detail in the French patent application FR16 / 62340 filed on December 12, 2016 (council reference B15344).
    As will be described in more detail below, the pixel 100 is for example part of an image sensor capable of capturing depth information on the basis of the principle called time of flight (ToF). Time-of-flight devices operate by emitting a light signal to an image scene and then detecting, using the image sensor, the returning light signal reflected by objects in the image scene. By calculating the time of flight of the light signal, the distance of objects from the image scene relative to the sensor can be estimated. The time of flight is for example calculated by emitting a periodic light signal towards the image scene, and by sampling the signal which returns several times during the period of the light signal in order to detect the phase shift of the light signal which returns. For example, a technique based on the detection of four samples per period is described in more detail in the publication by R. Lange and P. Seitz entitled Solid-state TOF range camera, IEEE J. on Quantum Electronics, vol. 37, No.3, March 2001. A technique based on the detection of three samples is described in more detail in the aforementioned French patent application FR16 / 62340.
    The pixel 100 includes a hatched rectangular central zone 102 corresponding to a photodiode and four transfer doors 104, 106, 108 and 110 arranged on the respective corners of the photodiode 102 is connecting the photodiode to four corresponding charge storage zones 114, 116 , 118 and 120. In the example of FIG. 1A, each charge storage area 114 to 120 extends along a corresponding edge of the photodiode 102, then continues in the form of a protuberance from the
    B15678 - DD17702JB pixel. A corresponding detection node 124, 126, 128, 130 is disposed at the other end of each charge storage area, and is connected to the charge storage area by a corresponding transfer door 134, 136, 138 , 140. Each load storage area 114 to 120 is for example bordered on all sides by a corresponding insulation trench 144, 146, 148, 150, except in an opening in the vicinity of the corresponding transfer door 104 to 110 The isolation trenches include, for example, a conductive wall surrounded by an insulating layer so that a bias voltage can be applied to them. For example, the isolation trenches 144 to 150 are trenches known in the art under the name of CDTI (from the English capacitive deep trench isolation).
    Figure IB is a sectional view taken along a line AA 'in Figure IA, intersecting the load storage area 118, passing along the load storage area 120 and passing through the transfer gate 140 and the node detection 130. As illustrated, the isolation trenches 148 and 150 each comprise, for example, a conductive core 152, for example made of polycrystalline silicon, isolated from the charge storage area and from the substrate by an insulating layer 154. In the example of FIG. 1B, the charge storage zones 118 and 120 are N type zones, formed in a P type substrate. The charge storage zones 118, 120 are for example covered with P type layers heavily doped 156.
    As explained previously in the prior art section, when the pixel dimensions decrease, it would be desirable to maintain the charge storage capacity of charge storage areas 114 to 120. However, the options for increasing the size such charge storage areas are limited. Indeed, it is generally necessary to keep the width and the depth of the trenches in order to maintain the load transport properties. This involves maintaining or increasing the lengths of the charge storage areas.
    B15678 - DD17702JB
    However, there is a difficulty in that further increasing the extent to which the charge storage areas 114 to 120 exit the pixel will lead to a non-optimal arrangement of the pixel array.
    One solution to solve this difficulty could consist in providing load storage zones which are no longer straight, but which include one or more elbows. However, there is a difficulty that this may create potential wells due to variations in the width of the charge storage area between the electrodes at the corners, and that charge carriers therefore risk be prevented from being properly evacuated from the entire storage area.
    FIG. 2A is a flat view of a charge storage structure 200 according to an exemplary embodiment of the present description. The load storage structure 200 comprises load storage trenches 202 and 204 connected by a connecting channel 206. The load storage trenches 202, 204 are for example screened with respect to light. The charge storage trench 202 has an end 208 arranged to receive charge carriers accumulated by a photodiode PD (not illustrated in FIG. 2A). For example, the load storage structure 200 could replace each of the load storage areas 114 to 120 in Figure IA. Alternatively, the charge storage structure 200 of Figure 2 could be incorporated into any type of pixel in an image matrix in which charge storage is to be provided.
    The load storage trenches 202 and 204 are for example delimited by an isolation trench 210, and the trench 204 has for example one end which is closed by the isolation trench 210. The isolation trench 210 has for example the same structure as the isolation trenches of Figure IA, and comprises for example a conductive core for applying a bias voltage to it. The bias voltage is for example chosen to be substantially equal to 0 V or
    B1567Ô - DD17702JB at a negative voltage level in order to laterally pinch the photodiode and the storage trenches and electrically passivate the isolated walls of the CDTI trenches in order to limit the dark current. Additionally, the implantation in the trenches 202, 204 causes for example a lateral pinching of the charges due for example to a higher concentration of doping towards the centers in the direction of the width of the trenches 202, 204. This helps the evacuation of load carriers when the load storage trenches are read.
    A transfer door 212 connects the other end 214 of the load storage trench 202 to a detection node 216. The transfer door 212 also connects the load storage trench 204 to the detection node 216.
    The connection channel 206 borders for example a portion of the edge of the transfer door 212. For example, the width Wlc of the connection channel 206 between the edge of the transfer door 212 and the isolation trench 210 is for example included between 20 nm and 300 nm, and is for example substantially equal to 100 nm. The length of the connecting channel 206 is for example between 100 nm and 2 pm. The trench 204 has for example a length Lt, measured between the isolation trench 210 and the edge of the transfer door 212, between 1 pm and 10 pm, and a width Wt between the isolation trenches 210 between 200 nm and 2 pm, and for example substantially equal to 400 nm. These dimensions are for example similar to those of trench 202.
    In the example of FIG. 2A, the transfer gate 212 has an L shape, one branch of the L connecting the trench 202 to the detection node 216, and the other branch of the L connecting the trench 204 to the detection node 216 In addition, the isolation trench 210 comprises for example a right angle bend 218 following the outside corner of the L-shaped transfer door 212, the connecting channel 206 being formed in the space between this corner. of the transfer door 212 and the elbow 218 of the isolation trench 210.
    B15678 - DD17702JB
    A broken line 220 in FIG. 2A, passing through portions of the isolation trench 210 delimiting the trenches 202, 204 and close to the outer edge of the L-shaped transfer door 212, illustrates an example of the limits of the mask d layout used to form the storage trenches 202, 204 and the connecting channel 206. A dashed line 222, passing through a portion of the isolation trench 210 and close to the inner edge of the shaped transfer door of L 202, illustrates an example of the limits of the implantation mask used to form the detection node 216.
    The trenches 202, 204 and the connecting channel 206 are all for example formed from N-type silicon, and are therefore adapted to hold electrons.
    Figure 2B is a sectional view of the charge storage structure 200 of Figure 2A, taken along a line AA 'passing through the isolation trench 210, along the trench 204, through the transfer door 212 and the detection node 216, and again through the isolation trench 210. This section is very similar to the section of FIG. IB except for the charge storage area 118, and will not be described from new in detail. However, in the example of FIG. 2B, the N type trench 204 extends to a region below the door 212, facilitating the transfer of load during a reading phase of the load storage trench 204 In addition, a heavily doped P-type region (P +) 228 is for example formed under the detection node 216 and extends partially under the door 212, this implantation helping to prevent the displacement of charge towards the detection node 216 when the transfer door 212 is in the non-conductive state. In FIG. 2B, the conductive core of the insulation trench 210 is referenced 230 and the insulating layer surrounding the conductive core 230 is referenced 232. In addition, the heavily doped P-type layer covering the charge storage trench 204 is referenced 234.
    B15678 - DD17702JB
    It will be noted from FIG. 2B that the N type charge storage trench 204 is pinched vertically between the P type layer 234 and the P type substrate. The trench 202 has for example a similar structure.
    For example, in certain embodiments, the P-type substrate has a concentration of P dopants between 14 cm -3 and 17 cm -3 , the charge storage trenches 202, 204 have a concentration of N dopants between 1_7 cm -3 and 20 cm -3 , layer 234 and the region of 228 have a concentration of P dopants between 18 cm -3 and 21 cm -3 , and the detection node 216 has a concentration in N dopants between 18 cm -3 and 5th 21 cm -3 .
    Figure 2C is a sectional view of the charge storage structure 200 of Figure 2A, taken along a line BB 'passing through the isolation trench 210, along the trench 204, along the connecting channel 206, and along trench 202.
    As illustrated, the depth of the N-type region forming the connecting channel 206 is for example uniform along the length of the connecting channel 206, and is for example the same as that of the trenches 202 and 204. In addition, in some embodiments, the dopant concentrations are for example the same in the trenches 202, 204 and the connecting channel 206, which avoids the need for additional implantation masks.
    FIG. 2D is a diagram illustrating an example of peak electrostatic potential curves along the sections AA 'and B-B' of the charge storage structure of FIG. 2A.
    A curve 240 represents the peak electrostatic potential along section A-A 'of FIG. 2A. It has been assumed that the transfer gate 212 is non-conductive due to an appropriate voltage applied to it, which is for example a voltage of 0 V. Thus, as illustrated by the curve 240, from the channel 204 , in which there is a relatively high electrostatic potential, for example of substantially 2 V, the potential
    B1567Ô - DD17702JB electrostatic drops close to zero at a point 242 under the transfer door 212. The electrostatic potential then increases, for example quickly up to a level 244 of more than 3 V at the level of the detection node 216.
    A curve 246 represents the peak electrostatic potential along the section B-B '. The electrostatic potentials close to the centers of the trenches 202, 204 are for example close to 2 V, and fall when approaching the connecting channel 206. In the connecting channel 206, the electrostatic potential is for example lower than that of the centers of the trenches 202, 204, but higher than the level below the door 212. For example, the electrostatic potential in the connecting channel 206 is approximately 1.5 V. This electrostatic potential in the connecting channel 206 is for example chosen from so that there is a partial barrier between the load storage trenches 202 and 204, which causes a load overflow from the trench 202 to the trench 204 when a certain level of load is reached, while avoiding the charge leakage through transfer door 212.
    In some embodiments, the dimensions of the connecting channel 206, the concentration of dopants in the connecting channel 206, and the voltage level applied to the transfer door 212, are arranged such that when the transfer door is non-conductive, the energy interval separating the connecting channel 206 and the detection node 216 is at least 10 kT, where k is the Boltzmann constant and T is the temperature, and in some embodiments is at least 30 kT. Advantageously, the width of the connecting channel is chosen to be between 20 nm and 300 nm to avoid the formation of potential wells between the two charge storage trenches during the reading phase, while maintaining a potential difference greater than 10 kT while the transfer door is non-conductive. In addition, the connecting channel 206 provides a barrier of electrostatic potential between the charge storage trenches 202 and 204, and the connecting channel is by
    B1567Ô - DD17702JB example arranged so that the electrostatic potential barrier is lower than the electrostatic potential barrier between the charge storage trench 202 and the detection node 216.
    Although this is not illustrated in Figure 2D, the potential barrier between the charge storage trenches is calibrated so that no potential barrier is formed along the connecting channel when the voltage applied to the gate transfer 216 makes it conductive. For example, the transfer door 216 is made conductive by the application of a positive voltage between 1 and 3 V, which causes the evacuation of the charges stored in the trenches 202 and 204 towards the detection node 216, d '' where they can be read in a conventional way.
    FIG. 3A is a flat view of a charge storage structure 300 according to another exemplary embodiment. The charge storage structure 300 is similar to the charge storage structure 200 of Figure 2A, and the like elements have the same reference numerals and will not be described again in detail.
    Compared : to the structure 200 , the structure 300 includes another trench storage of charge 302 who communicates with the trench storage of charge 204 by through a channel link 306. The trench 302 East
    for example substantially parallel to the trench 204, so that the load storage structure 300 resembles a letter F upside down. Each of the trenches 204 and 302 has, for example, one end which is closed by the isolation trenches 210.
    Like the connecting channel 206, the connecting channel 306 passes for example along an edge of the transfer door 212, which is enlarged in FIG. 3A to also connect the trench 302 to the detection node 216. However, at the Unlike the connecting channel 206, the connecting channel 306 is for example straight. For example, the width Wlc of the connecting channel 306 between the “edge of the transfer door 212 and the isolation trench 210 is
    B15678 - DD17702JB between 5 nm and 1 pm. The length of the connecting channel 306 is for example between 100 nm and 2 pm.
    FIG. 3B is a diagram illustrating an example of curves of peak electrostatic potential along the sections AA ′, BB z -B, and C-C′-C of the charge storage structure of FIG. 3A. Assume that the transfer gate 212 is non-conductive due to an appropriate voltage applied to it, which is for example a voltage of 0 V.
    A curve 310 represents the peak electrostatic potential along section A-A ', which extends from the end 208 of the trench 202, along the trench 202, through the transfer gate 212, and in the node of detection 216. From channel 202, in which there is for example an electrostatic potential close to 2 V, the electrostatic potential drops to near zero at a point 312 under the transfer door 212. An arrow 314 in FIG. 3B represents the potential difference between the trench 202 and the transfer gate 212, and a hatched region 316 in FIG. 3B represents the charge storage capacity of the trench 202, which is a function of the potential difference 314. The peak electrostatic potential represented by the curve 310 for example then increases rapidly to a level 318 which is greater than 3 V at the level of the detection node 216.
    A dotted curve 320 represents the peak electrostatic potential along the section B-B'-B, which extends along the trench 202, diagonally across the connecting channel 206, along the trench 204 up to at its end, then returns along the trench 204, through the transfer gate 212 and into the detection node 216. As represented by the curve 320, the peak electrostatic potential drops to a low point 322 in the connecting channel 206, before returning to a relatively high potential in the trench 204. The electrostatic potential then drops close to zero at a point 324 under the transfer gate 212. A hatched region 326 represents the charge storage capacity of the trench 204. The peak electrostatic potential represented by the curve 320
    B1567Ô - DD17702JB then increases rapidly to a level 328 greater than 3 V at the detection node 216.
    A curve 330 represents the peak electrostatic potential along the section C-C'-C, which extends from the trench 204, along the connecting channel 306, along the trench 302 to its end , then returns along the trench 302, through the transfer gate 212 and into the detection node 216. From the channel 204, in which there is for example an electrostatic potential approaching 2 V, the potential electrostatic drops to a low point 332 in the connecting channel 306, before returning to a relatively high potential in the trench 302. The electrostatic potential then drops close to zero at a point 334 located under the transfer gate 212. A hatched region 336 represents the charge storage capacity of the trench 302. The peak electrostatic potential represented by the curve 330 then increases for example rapidly to a level 338 greater than 3 V at the level of the detection node 216.
    An arrow 340 in FIG. 3B represents the potential difference between the electrostatic potentials in the trenches 202, 204, 302 and the electrostatic potentials in the connecting channels 206, 306. For example, the dimensions of the connecting channels 206 and 306, the dopant concentration in the connecting channels 206 and 306, and the voltage level applied to the transfer gate 212 are arranged so that the energy gap separating the connecting channels 206, 306 and the detection node 216 is at least 10 kT, where k is the Boltzmann constant and T is the temperature, and in some embodiments is at least 30 kT.
    FIG. 4 is a flat view of a charge storage structure 400 according to another exemplary embodiment. Many elements are similar to those of the structure 300 of FIG. 3A, and these elements have the same reference numbers and will not be described again in detail. In particular, the charge storage structure 400 is by
    B15678 - DD17702JB example the same as the load storage structure 300, except that it has been made symmetrical with respect to an axis of symmetry 402 which extends along the length of the trench 202, and through the detection node 216 There is thus another load storage trench 204 'symmetrically opposed to the trench 204, and yet another load storage trench 302' symmetrically opposite to the trench 302. The trenches 204 'and 302' are for example interconnected by a connection channel 306 ′ similar to channel 306. The transfer door 212 is for example replaced in the structure 400 by a transfer door 412 having a U shape surrounding the detection node 216 on all the sides except one, and thus connecting the trenches 204 'and 302' to the detection node 216.
    FIG. 5 is a flat view of a charge storage structure 500 according to yet another exemplary embodiment. The structure 500 is for example similar to the structure 400 of FIG. 4, and the similar elements bear the same reference numbers and will not be described again in detail. The structure 500 for example additionally comprises a load storage trench 502 which extends opposite the trench 202, and is for example connected to the trench 302 by a connecting channel 506 and to the trench 302 'by a connecting channel 506 '. The connecting channels 506 and 506 'are for example similar to the connecting channels 206 and 206'. The transfer door 412 of FIG. 4 is for example replaced in the structure 500 by a transfer door 512 having the shape of a square letter O, the detection node 216 being entirely surrounded by the transfer door 512. The door transfer 512 connects not only the trenches 204, 204 ', 302 and 302' to the detection node 216, but also the trench 502 to the detection node 216.
    Like the trenches 204, 204 ', 302 and 302', the trench 502 has for example a length Lt from the isolation trench 210 to the edge of the transfer door 512
    B15678 - DD17702JB between 1 pm and 10 pm, and a width Wt between the isolation trenches 210 between 200 nm and 2 pm.
    FIG. 6 is a flat view of an image matrix 600, which is for example a depth sensor based on the time of flight. The image matrix 600 comprises for example pixels 602, each pixel 602 comprising charge storage structures 604 (referenced only in the pixel at the top left of FIG. 6). The example in FIG. 6 represents 15 pixels arranged in a 5 by 3 matrix. However, the dimensions of the matrix can be any. The load storage structures 604 are for example similar to the structure 400 of FIG. 4, except that the trenches 302 and 302 ′ have been omitted, so that the structure has the shape of a letter T.
    Each pixel 602 includes a photodiode 606 (referenced only in the top left pixel in Figure 6), which is similar to photodiode 102 in Figure IA, and four transfer gates are arranged thereon similarly to transfer doors 104, 106, 108 and 110 of Figure 1Ά. In the embodiment of FIG. 6, each pixel 602 comprises three charge storage structures 604 extending from three respective sides of the photodiode 606. This makes it possible for example to capture three samples per period of the periodic light signal as this has been described previously with reference to FIG. IA. Another structure 608 extending from the fourth side of the photodiode 606 of each pixel 602 is for example used for a reset of the photodiode and / or for an anti-glare purpose.
    Advantageously, it can be seen in FIG. 6 that the T-shaped charge storage structures can be arranged with a spatially efficient arrangement with relatively little empty chip surface around each pixel. For example, the T bar of some charge storage structures extends next to the T rod of the charge storage structures of adjacent pixels.
    B15678 - DD17702JB
    Another advantage of the T-shaped charge storage structure is that the sensing node 216 can have relatively small dimensions, while the number of charge storage trenches provides a relatively high charge storage capacity. A similar advantage is found in the structure of Figure 5 in which the trenches 302 and 302 'are omitted so that the charge storage structure forms a cross or a + shape. In such a structure, the trench 502 is for example connected to the trenches 204, 204 'by connecting channels similar to the channels 506, 506' illustrated in FIG. 5.
    An advantage of the embodiments described here is that charge storage structures can provide additional charge storage volume without increasing the length of the charge storage trenches, and while allowing efficient charge evacuation during the reading phase .
    With the description thus made of at least one illustrative embodiment, various alterations, modifications and improvements will readily appear to those skilled in the art. For example, although embodiments based on the storage of electrons in N-type trenches have been described, it will be clear to those skilled in the art that the same principles could be applied to the storage of holes in P-type trenches
    In addition, although embodiments have been described in which the charge storage trenches are delimited by insulation trenches having a conductive core, it will be clear to those skilled in the art that one could use different types of isolation trenches, and in addition or in place that one could use layouts to delimit the load storage trenches.
    Furthermore, although particular examples of arrangement of the connecting channels 206 and 306 have been described, it will be clear to those skilled in the art that other embodiments would be possible. It would also be possible to include several detection nodes for a load storage structure
    B15678 - DD17702JB given, the detection nodes being coupled together by metallic layers, and making it possible to chain-link several charge storage trenches via the detection nodes.
    B1567Ô - DD17702JB
    权利要求:
    Claims (13)
    [1" id="c-fr-0001]
    1. Pixel of an image matrix comprising one or more charge storage structures (200, 300, 400, 500), each charge storage structure comprising:
    a first charge storage trench (202) doped to have a first type of conductivity and having a first end (208) arranged to receive the charge accumulated by a photodiode (606);
    a second charge storage trench (204, 204 ') doped to have the first type of conductivity; and a first transfer door (212, 412, 512) connecting a second end (214) of the first load storage trench (202), and the second load storage trench (202, 204, 204 '), to a detection node (216), the first and second charge storage trenches being connected together by a connecting channel (206, 206 ') doped to have the first type of conductivity and bordering a portion of an edge of the door
    of transfer (212, 412, 512). 2. Pixel according to claim 1, in which channel of bond (206, 206 ') has a width included Between 20 nm and 300 nm. 3. Pixel according to claim 1 or 2, in which the connecting channel (206, 206 ') includes a bend angle law.
    [2" id="c-fr-0002]
    4. Pixel according to any one of claims 1 to 3, in which the link channel (206, 206 ') provides an electrostatic potential barrier between the first and second charge storage trenches (202, 204, 204') , the connecting channel being arranged such that the electrostatic potential barrier is less than an electrostatic potential barrier between the first charge storage trench and the detection node (216).
    [3" id="c-fr-0003]
    5. Pixel according to claim 4, in which the dimensions of the link channel (206, 206 '), the concentration of dopants in the link channel (206, 206'), and / or a voltage level applied to the first transfer door (212, 412, 512)
    B15678 - DD17702JB are arranged so that the energy interval between the link channel and the detection node is at least 10 kT, where k is the Boltzmann constant, and T is the temperature.
    [4" id="c-fr-0004]
    6. Pixel according to any one of claims 1 to 5, in which the second load storage trench (204) extends perpendicular to the first load storage trench (202).
    [5" id="c-fr-0005]
    7. The pixel of claim 6, wherein, in addition to the first and second charge storage trenches, each charge storage structure comprises at most two other charge storage trenches, the trenches of each charge storage structure forming a T shape or a cross shape.
    [6" id="c-fr-0006]
    8. Pixel according to any one of claims 1 to
    7, wherein the pixel further comprises a photodiode (606) connected to the first charge storage trench (202) by a second transfer gate.
    [7" id="c-fr-0007]
    9. Pixel according to any one of claims 1 to
    8, in which the first and second charge storage trenches (202, 204, 204 ') are delimited laterally over at least a portion of their length by capacitive isolation trenches (210) arranged to be polarized by a voltage of polarization.
    [8" id="c-fr-0008]
    10. Pixel according to any one of claims 1 to
    9, further comprising a third charge storage trench (302, 302 ', 204') doped to have the first type of conductivity and connected to the first or to the second charge storage trench by another connecting channel ( 306, 206 ') doped to have the first type of conductivity and bordering another portion of the edge of the transfer door (212, 412, 512).
    [9" id="c-fr-0009]
    11. Pixel according to any one of claims 1 to
    10, comprising a plurality of said charge storage structures (200, 300, 400, 500).
    B15678 - DD17702JB
    [10" id="c-fr-0010]
    12. An image matrix comprising a pixel matrix, each pixel corresponding to the pixel of any one of claims 1 to 11.
    [11" id="c-fr-0011]
    13. A method of manufacturing a pixel from an image matrix, the method comprising forming one or more charge storage structures (200, 300, 400, 500), each charge storage structure being formed:
    by forming a first charge storage trench (202) doped to have a first type of conductivity and having
    A first end (208) arranged to receive the charge accumulated by a photodiode (606);
    forming a second charge storage trench (204, 204 ') doped to have the first type of conductivity; and by forming a first transfer door (212, 412,
    [12" id="c-fr-0012]
    15 512) connecting a second end of the first load storage trench, and the second load storage trench, to a detection node (216), the first and second load storage trenches being interconnected by a channel link (206, 206 ') doped to have the first type of
    [13" id="c-fr-0013]
    20 conductivity and bordering a portion of an edge of the transfer door.
    B 15678 DD1.7702JB
    1/6
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    引用文献:
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    US20100073541A1|2006-11-30|2010-03-25|National University Corporation Shizuoka Univ.|Semiconductor range-finding element and solid-state imaging device|
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    US8293629B2|2010-04-06|2012-10-23|Omnivision Technologies, Inc.|High full-well capacity pixel with graded photodetector implant|
    US8804021B2|2011-11-03|2014-08-12|Omnivision Technologies, Inc.|Method, apparatus and system for providing improved full well capacity in an image sensor pixel|US10491877B1|2017-12-21|2019-11-26|Facebook Technologies, Llc|Depth camera assembly using multiplexed sensor phase measurements to determine depth using fringe interferometry|
    FR3085231B1|2018-08-24|2020-09-25|St Microelectronics Crolles 2 Sas|HIGH DYNAMIC AND LOW NOISE IMAGE SENSOR|
    FR3094571A1|2019-03-27|2020-10-02|StmicroelectronicsSas|Electronic photodiode device|
    法律状态:
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    2018-11-02| PLSC| Publication of the preliminary search report|Effective date: 20181102 |
    2019-04-29| PLFP| Fee payment|Year of fee payment: 3 |
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    2021-04-29| PLFP| Fee payment|Year of fee payment: 5 |
    优先权:
    申请号 | 申请日 | 专利标题
    FR1753771A|FR3065836B1|2017-04-28|2017-04-28|STORAGE AREA FOR A PIXEL OF AN IMAGE MATRIX|
    FR1753771|2017-04-28|FR1753771A| FR3065836B1|2017-04-28|2017-04-28|STORAGE AREA FOR A PIXEL OF AN IMAGE MATRIX|
    US15/959,763| US10468440B2|2017-04-28|2018-04-23|Storage zone for an image array pixel|
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